Gregory A Happel

Owner Web-Strategi.com; Cedar Rapids, IA; 2007- Present

Software Engineer Rockwell Collins; Cedar Rapids, IA; 2008- Present

  • Integration member for Fab-T

ASIC Engineer Rockwell Collins; Cedar Rapids, IA; 1996 – 2008

Verification Engineer (2001 – 2008):

  • Lead Verification Engineer: Pyxis

  • Lead 7 people towards completing their verification goals

  • Learned and assisted other team members on the new OOP verifcation language, System Verilog.

  • Provided input for budget, scheduling, tool requirements.

  • Created reusable, self-checking, easy to use, VHDL, simulation environments with directed randomized testing and simultaneous control of multiple BFMs.

  • Lead Verification Engineer: Programmable Crypto; GPS AntiJam IR&D ; JTRS Cluster 1, 1553/E1; MILSTAR

  • Verification Engineer: LAN Switch – helped develop precursor to above systems.

  • Developed scripts and make files to automate the design process

  • Assisted in updating the Rockwell Collins VHDL Style Guide

RTL Design (1996 – 2002):

  • Implemented ¾ of the design for a 1553 (Black) and E1(Red) interfaces for JTRS Cluster 1 FPGA.s

  • Part of a MILSTAR team that implemented limited modes of LDR and XDR.

  • Designed Error Detection And Correction FPGA for a Deterministic LAN Switch

  • Designed FPGAs and ASICs with testbenches, assisted in integration for government programs: CoRE LAN Switch EDAC, Commanche Helicopter, National Missile Defense, and F22/Datalinks

Related Technology and Software Experience:

  • System Verilog, VHDL, C, Perl, PSL, Mentor Graphics Digital Simulator, Flowtracer, SVN, Clearcase, Synopsys PowerPC & Ethernet Flex Models, Denali Memory Models, Linux, Actel, Altera, Xilinx, XP, MS Office Suite, Lotus Notes

1994 - 1996 Hupp Industrial Automation Cedar Rapids, IA

Controls Engineer

  • Designed and installed control systems for companies in US and Canada.

  1. Starch Cooker for paper mill; EB Eddy, Ontario Canada

  2. Explosive Liquid transfer handling system; Cargill Corn, Cedar Rapids, IA

Patent Pending on an interface between any FPGA development board and Questasim.

Woodcarving, Artwork, Violin, Trumpet, Piano, Martial Arts, Evangelism/Theology, Politics

German (functionally proficient), Biblical Hebrew (1 yr)